Sunday, June 7, 2020

VLANS Building a Virtual Local Area Networking Importance - 825 Words

VLANS: Importance of Building a Virtual Local Area Networking (Essay Sample) Content: CSE/EEE 120Simulation Lab 4 Answer Sheet The Microprocessor Name:____Mario Martinez_______Date:_________6/29/16________Task 4-1: Build the Brainless Central Processing UnitInclude a picture of your Logisim Brainless Central Processing Unit circuit here:Task 4-2: Test and Control the Brainless Central Processing UnitPerform the testing procedures outlined in the laboratory manual and fill in the blanks below. (Note that these questions appear in the text of the laboratory manual.) Record the first number placed on the data bus here:___ 4à ¢Ã¢â€š ¬b0001 OR 1____ What do the following three switches need to be set to in order to perform the pass-through operation? /~A_Only =_0__ /~Invert=_0__ Logic/~Arith=_0__Enter the second number you entered into the data bus here:___2_____ What do the following three switches need to be set to in order to perform the ADD operation? /~A_Only =_1__ /~Invert=_0__ Logic/~Arith=_0__ Write down th e number that appears in the accumulator here:_________3_________Describe other numerical additions and other operations you checked in order to verify your brainless CPU here:_______ A_only = 1 Invert = 0 Logic/Arith = 1 for A OR B,Data Bus value is 4à ¢Ã¢â€š ¬b1001 and accumulation value is 4à ¢Ã¢â€š ¬b0001, Hence final value is 4à ¢Ã¢â€š ¬b1001_____________________________________________________________________________________After you are convinced your circuit is working properly, remove the 4-bit binary keyboard and set the ACC to Data Bus pin to 1. Did the output of the accumulator appear on the data bus? ____Yes________How does the output of the ALU change?______ The output of the ALU is changing with respect to the Accumulator value, Depending on the input operation it is adding or sub with the previous accumulator value.__________________________________________________________________________________If the 4-bit binary keyboard was not removed and the ACC to Data Bus switch is set to 1, what would you expect to see displayed in the hex digit display attached to the data bus? _______ Nothing is displayed (Only à ¢Ã¢â€š ¬Ã‹Å"à ¢Ã¢â€š ¬Ãƒ ¢Ã¢â€š ¬Ã‹Å"is displayed) _____________________________Add the 4-bit binary keyboard back into your circuit and observe the hex digit display on the data bus for various keyboard values. Is the value on the hex digit display what you expected?___ No, Because the Access to data bus is disabled ,hence the value is not displayed on the HEX display___________ _____________________________________________________________________________________Why do you think the register at the output of the ALU is called the à ¢Ã¢â€š ¬Ã‹Å"accumulatorà ¢Ã¢â€š ¬?___ Because it is storing the previous value at the positive edge of each clock for further operations, so we can consider this is accumulator Task 4-3: Build the Addressing LogicInclude a picture of your Logisim addressing logic circuit here:Test your circuit and r ecord the results in Table 1. Include a picture of your Logisim addressing logic circuit testing set up.Table 1A (4-bit binary)Y0Y1Y2Y3Y4Y5Y6Y7000010000000010100000100011100000001001100100000Task 4-4: Build a 4-Bit ROM Memory CellInclude a picture of your Logisim 4-bit ROM circuit here:Test your circuit and record the results in Table 2. Include a picture of your Logisim 4-bit ROM circuit testing set up.Table 2A (4-bit binary)ReadMemory SelectY (Data Bus) 001000xxxx0001110001010000xxxx010110xxxx000001xxxx0111110111Task 4-5: Build 4-Bit Output PortInclude a picture of your Logisim 4-bit output port circuit here:Test your circuit and record the results in Table . Table 3Data Bus (4-bit binary)WriteMemory SelectQ00101100100011010010010000001001011000100110110110011111011110001001111001010111Task 4-6: Build the 4-Bit RAM CellInclude a picture of your Logisim 4-bit RAM circuit here:Test your circuit and record the results in Table . Include a picture of your Logisim 4-bit RAM circuit testing set up.Table 4Data Bus (4-bit binary)WriteMemory SelectReadQ {between register and buffer} Data Bus {after buffer} 10011109Xxxx10111009Xxxx01010119100100110019Xxxx000011130011Task 4-7: Build the Brainless MicroprocessorInclude a picture of your Logisim brainless microprocessor circuit here:Task 4-8: Testing and Controlling the Brainless MicroprocessorFollow steps 1 through 3 outlined in the laboratory manual to test your brainless microprocessor circuit. List in Table the control lines you needed to control to store the accumulator (ACC) to RAM. (If the control line value has no impact, place a dash à ¢Ã¢â€š ¬Ã‹Å"-à ¢Ã¢â€š ¬Ã‹Å" in the value column).Table 5Control lineValue4-bit binary keyboard(Address Bus)1111Write1Read0ACC to Data Bus1Load ACC1/~A_Only0/~Invert0Logic/~Arith0Describe any other tests that you performed. NOTE: the laboratory manual gives you a minimum set of items to test: ___ _______________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________Error: Reference source not found is an example, for the ADD command, of how to fill out tables to record the values of the control lines during every clock cycle.Table 6Instruction [ Add operand to Accumulator (ACC) ]Control LineValue4-bit Binary Keyboard (Address Bus)Address of operandWrite0Read1ACC to Data Bus0Load ACC1/~A_Only1/~Invert1Logic/~Arith0For all of the instructions you performed (i.e. Subtract, Load ACC, etc.) record the values of the control lines during every clock cycle in Error: Reference source not found, Error: Reference source not found and Error: Reference sour ce not found. Table 7Instruction [ Subtract operand from ACC ]Control LineValue4-bit Binary Keyboard (Address Bus)0001,0010Write0Read1ACC to Data Bus0Load ACC1/~A_Only1/~Invert1Logic/~Arith0Table 8Instruction [ Load ACC with operand ]Control LineValue4-bit Binary Keyboard (Address Bus)0010Write0Read1ACC to Data Bus0Load ACC1/~A_Only0/~Invert0Logic/~Arith0Instruction [XOR operand with ACC]Control LineValue4-bit Binary Keyboard (Address Bus)0001Write0Read1ACC to Data Bus0Load ACC1/~A_Only0/~Invert0Logic/~Arith1Instruction [ Store ACC to RAM ]Control LineValue4-bit Binary Keyboard (Address Bus)1111Write1Read0ACC to Data Bus1Load ACC1/~A_Only0/~Invert0Logic/~Arith0Table 9Instruction [ Not (operand) to ACC ] (1à ¢Ã¢â€š ¬s complement)Control LineValue4-bit Binary Keyboard (Address Bus)0001Write0Read1ACC to Data Bus0Load ACC1/~A_Only0/~Invert1Logic/~Arith1Instruction [ Negate(operand) to ACC ](2à ¢Ã¢â€š ¬s complement)Control LineValue4-bit Binary Keyboard (Address Bus)0001Write0Read1AC C to Data Bus0Load ACC1/~A_Only0/~Invert1Logic/~Arith0Task 4-9: Build the Memory-Address-Generation CircuitInclude a picture of your Logisim memory address generation circuit here:Task 4-10: Build the Controller CircuitInclude a picture of your Logisim controller circuit here:Task 4-11: Build the Complete Microprocessor CircuitInclude a picture of your Logisim complete microprocessor circuit, with controller, here:Task 4-12: Write and Execute a Simple Program for Your MicroprocessorWrite the program given in your laboratory manual into the appropriate memory locations. Observe the operation of each step of your program (i.e. observe the values of the control lines and record whether data is being moved properly according to those control line settings). Did you get an 8 stored into the accumulator with you initial test?__Yes____If not, what error(s) did you find during your debugging process?______________________________________________________________________________________...

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